• JEDEC JEP116
Provide PDF Format

Learn More

JEDEC JEP116

  • CMOS SEMICUSTOM DESIGN GUIDELINES
  • standard by JEDEC Solid State Technology Association, 11/01/1991
  • Publisher: JEDEC

$71.00$141.00


The design of ASIC circuits is becoming a significant part of system or product design, yet many problems continue to exist in current design practice. The guidelines in this document provide an explanation of common ASIC design problems and concerns and where possible offer solutions.

Related Products

JEDEC JESD20

JEDEC JESD20

STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES..

$96.00 $191.00

JEDEC JEP144

JEDEC JEP144

GUIDELINE FOR RESIDUAL GAS ANALYSIS (RGA) FOR MICROELECTRONIC PACKAGES..

$37.00 $74.00

JEDEC JESD47I

JEDEC JESD47I

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS..

$36.00 $72.00

JEDEC JEP160

JEDEC JEP160

Long-Term Storage for Electronic Solid-State Wafers, Dice, and Devices..

$34.00 $67.00