• JEDEC JEP126
Provide PDF Format

Learn More

JEDEC JEP126

  • GUIDELINE FOR DEVELOPING AND DOCUMENTING PACKAGE ELECTRICAL MODELS DERIVED FROM COMPUTATIONAL ANALYSIS
  • standard by JEDEC Solid State Technology Association, 05/01/1996
  • Publisher: JEDEC

$24.00$48.00


This publication provides a guideline to suppliers of IC components with a template for documenting the numerical simulation assumptions. In addition this guideline also suggests a model environment to reference when comparing various packages or component suppliers. This publication should improve the communication between the package model suppliers. This publication should improve the communication between the package model supplier and the end user.

Related Products

JEDEC JESD 482-A (R2002)

JEDEC JESD 482-A (R2002)

LIST OF PREFERRED VALUES FOR USE ON VARIOUS TYPES OF SMALL SIGNAL AND REGULATOR DIODES..

$24.00 $48.00

JEDEC JESD 82-24

JEDEC JESD 82-24

DEFINITION OF the SSTUB32865 28-bit 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS..

$36.00 $72.00

JEDEC JESD235

JEDEC JESD235

HIGH BANDWIDTH MEMORY (HBM) DRAM..

$96.00 $191.00

JEDEC JESD220-2

JEDEC JESD220-2

UNIVERSAL FLASH STORAGE (UFS) CARD EXTENSION..

$31.00 $62.00