Provide PDF Format
JEDEC JEP69-B (R1999)
- PREFERRED LEAD CONFIGURATION FOR FIELD-EFFECT TRANSISTORS
- standard by JEDEC Solid State Technology Association, 11/01/1973
- Publisher: JEDEC
$24.00$48.00
This publication indicates preferred pinouts for FETs in various package designs.
Related Products
JEDEC JEP158
3D Chip Stack with Through-Silicon Vias (TSVS): Identifying, Evaluating and Understanding Reliabilit..
$31.00 $62.00
JEDEC JESD671B
Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Qual..
$30.00 $59.00
