Provide PDF Format
JEDEC JESD 12-1B
- ADDENDUM No. 1 to JESD12 - TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS
- Amendment by JEDEC Solid State Technology Association, 08/01/1993
- Publisher: JEDEC
$30.00$60.00
The purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.
Related Products
JEDEC JESD74A
EARLY LIFE FAILURE RATE CALCULATION PROCEDURE FOR SEMICONDUCTOR COMPONENTS..
$39.00 $78.00
JEDEC JESD82
DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS..
$30.00 $59.00
JEDEC JESD8-4
ADDENDUM No. 4 to JESD8 - CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STAN..
$24.00 $48.00