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JEDEC JESD 78C
- IC LATCH-UP TEST
- standard by JEDEC Solid State Technology Association, 09/01/2010
- Publisher: JEDEC
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This standard has been adopted by the Defense Logistics Agency (DLA) as project 5962-1880. This specification covers the I-test and the overvoltage latch-up testing of integrated circuits. The purpose of this specification is to establish a method for determining IC latch-up characteristics and to define latch-up failure criteria. Latch-up characteristics are extremely important in determining product reliability and minimizing No Trouble Found (NTF) and Electrical Overstress (EOS) failures due to latch-up. This test method is applicable to NMOS, CMOS, bipolar, and all variations and combinations of these technologies.
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