• JEDEC JESD82-15
Provide PDF Format

Learn More

JEDEC JESD82-15

  • STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
  • standard by JEDEC Solid State Technology Association, 11/01/2005
  • Publisher: JEDEC

$31.00$62.00


This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of a CUA878 PLL clock device for registered DDR2 DIMM applications. The purpose is to provide a standard for a CUA878 PLL clock device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.

Related Products

JEDEC JESD22-B109B

JEDEC JESD22-B109B

FLIP CHIP TENSILE PULL..

$28.00 $56.00

JEDEC JESD213

JEDEC JESD213

STANDARD TEST METHOD UTILIZING X-RAY FLUORESCENCE (XRF) FOR ANALYZING COMPONENT FINISHES AND SOLDER ..

$27.00 $53.00

JEDEC JESD22-B116A

JEDEC JESD22-B116A

WIRE BOND SHEAR TEST..

$31.00 $62.00

JEDEC JESD84-A41

JEDEC JESD84-A41

EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, STANDARD CAPACITY..

$36.00 $72.00