Provide PDF Format
JEDEC JESD82-4B
- STANDARD FOR DEFINITION OF THE SSTV16859 2.5 V, 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR STACKED DDR DIMM APPLICATIONS
- standard by JEDEC Solid State Technology Association, 05/01/2003
- Publisher: JEDEC
$30.00$59.00
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV16859 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Related Products
JEDEC JEP158
3D Chip Stack with Through-Silicon Vias (TSVS): Identifying, Evaluating and Understanding Reliabilit..
$31.00 $62.00
JEDEC JESD671B
Component Quality Problem Analysis and Corrective Action Requirements (Including Administrative Qual..
$30.00 $59.00