• JEDEC JESD90
Provide PDF Format

Learn More

JEDEC JESD90

  • A PROCEDURE FOR MEASURING P-CHANNEL MOSFET NEGATIVE BIAS TEMPERATURE INSTABILITIES
  • standard by JEDEC Solid State Technology Association, 11/01/2004
  • Publisher: JEDEC

$30.00$60.00


This document describes an accelerated stress and test methodology for measuring device parameter changes of a single p-channel MOSFET after Negative Bias Temperature Instability (NBTI) stress at dc bias conditions. This document gives a procedure to investigate NBTI stress in a symmetric voltage condition with the channel inverted (VGS < 0) and no channel conduction (VDS = 0).There can be NBTI degradation during channel conduction (VGS < 0, VDS < 0), however, this document does not cover this phenomena.

Related Products

JEDEC JESD76-2

JEDEC JESD76-2

STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (NORMAL RANGE OPERATION)..

$24.00 $48.00

JEDEC JESD 24

JEDEC JESD 24

POWER MOSFETS..

$46.00 $91.00

JEDEC JESD22-B106D

JEDEC JESD22-B106D

RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICES..

$27.00 $53.00

JEDEC JESD82-17

JEDEC JESD82-17

DEFINITION OF THE SSTUA32S868 AND SSTUA32D868 REGISTERED BUFFER WITH PARITY FOR 2R X 4 DDR2 RDIMM AP..

$37.00 $74.00