JEDEC
JEDEC is the global leader in developing open standards for the microelectronics industry. With over 4,000 volunteers representing nearly 300 member companies. JEDEC brings manufacturers and suppliers together on 50 different committees, creating standards to meet the diverse technical and developmental needs of the industry. These collaborations ensure product interoperability, benefiting the industry and ultimately consumers by decreasing time-to-market and reducing product development costs.
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TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROCOMPUTERS, MICROPROCESSORS, AND MEMORY INTEGRATED CI
$46.00 $91.00
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CHIP CARRIER PINOUTS STANDARDIZED FOR CMOS 4000, HC AND HCT SERIES OF LOGIC CIRCUITS
$27.00 $53.00
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SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)
$27.00 $54.00
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STANDARD SPECIFICATION FOR DESCRIPTION OF B SERIES CMOS DEVICES
$40.00 $80.00
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SEMICONDUCTOR POWER CONTROL MODULES
$30.00 $59.00
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THERMAL MODELING OVERVIEW
$26.00 $51.00
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COMPACT THERMAL MODEL OVERVIEW
$28.00 $56.00
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TWO-RESISTOR COMPACT THERMAL MODEL GUIDELINE
$31.00 $62.00
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DELPHI COMPACT THERMAL MODEL GUIDELINE
$34.00 $67.00
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ASSESSMENT OF AVERAGE OUTGOING QUALITY LEVELS IN PARTS PER MILLION (PPM)
$39.00 $78.00
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STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC
$40.00 $80.00
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DIGITAL BIPOLAR LOGIC PINOUTS FOR CHIP CARRIERS
$27.00 $53.00
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STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES
$96.00 $191.00
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ENVIRONMENTAL ACCEPTANCE REQUIREMENTS FOR TIN WHISKER SUSCEPTIBILITY OF TIN AND TIN ALLOY SURFACE FI
$37.00 $74.00
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METHOD FOR CHARACTERIZING THE ELECTROMIGRATION FAILURE TIME DISTRIBUTION OF INTERCONNECTS UNDER CONS
$31.00 $61.00
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