JEDEC
JEDEC is the global leader in developing open standards for the microelectronics industry. With over 4,000 volunteers representing nearly 300 member companies. JEDEC brings manufacturers and suppliers together on 50 different committees, creating standards to meet the diverse technical and developmental needs of the industry. These collaborations ensure product interoperability, benefiting the industry and ultimately consumers by decreasing time-to-market and reducing product development costs.
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HSUL_12 LPDDR2 and LPDDR3 I/O with Optional ODT
$39.00 $78.00
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UNIFIED WIDE POWER SUPPLY VOLTAGE RANGE CMOS DC INTERFACE STANDARD FOR NON-TERMINATED DIGITAL INTEGR
$26.00 $51.00
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POD12-1.2 V Pseudo Open Drain Interface
$142.00 $284.00
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POD10 - 1.0 V Pseudo Open Drain Interface
$28.00 $56.00
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1.2 V High-Speed LVCMOS (HS_LVCMOS) Interface
$24.00 $48.00
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ADDENDUM No. 3A to JESD8 - GUNNING TRANSCEIVER LOGIC (GTL) LOW-LEVEL, HIGH-SPEED INTERFACE STANDARD
$26.00 $51.00
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ADDENDUM No. 4 to JESD8 - CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STAN
$24.00 $48.00
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ADDENDUM No. 5 to JESD8 - 2.5 V 0.2 V (NORMAL RANGE), AND 1.8 V TO 2.7 V (WIDE RANGE) POWER SUPPLY V
$27.00 $54.00
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ADDENDUM No. 6 to JESD8 - HIGH SPEED TRANSCEIVER LOGIC (HSTL)- A 1.5 V OUTPUT BUFFER SUPPLY VOLTAGE
$30.00 $60.00
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ADDENDUM No. 7 to JESD8 - 1.8 V + -0.15 V (NORMAL RANGE), AND 1.2 V - 1.95 V (WIDE RANGE) POWER SUPP
$27.00 $54.00
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ADDENDUM No. 8 to JESD8 - STUB SERIES TERMINATED LOGIC FOR 3.3 VOLTS (SSTL_3) A 3.3 V VOLTAGE BASED
$30.00 $59.00
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STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES
$24.00 $48.00
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DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONS
$30.00 $59.00
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DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICAT
$40.00 $80.00
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DEFINITION OF 'CU878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
$30.00 $60.00
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